Chinese Communist Party newspaper says US is stealing technology from ‘our Taiwan’
but Global Times Calling it a “dark turn” for the global semiconductor industry, it accused the U.S. of tricking TSMC into building a new factory in Arizona. And with a creepy phrase accusing the United States of stealing the world’s most important technology from “our Taiwan.” The U.S. has long worried that China, which seeks to become self-sufficient in chip production, could attack Taiwan and go to war for control of the country, including over control of TSMC.
TSMC’s first factory in Arizona will start producing 4nm chips in 2024
TSMC has more than tripled its investment in the U.S. from $12 million to $40 million, and is expected to produce 600,000 wafers a year. That’s a drop in the bucket compared with the 12 million 12-inch wafers TSMC produces annually. While other tech companies have had some problems, TSMC continues to thrive. In November, the company’s revenue rose 50.2% YoY to US$7.27 billion.
By the time TSMC’s second fab starts operating in 2026, the company may already be producing chips using the 2nm process node, as it plans to mass produce at that node by 2025. From a technology perspective, the process node number itself means nothing and is simply used in the market for next-generation chip production. Each lower number generally means that the transistor size has been reduced, allowing the number of transistors per chip to increase.
TSMC and Samsung plan to produce 2nm chips by 2025
For example, the Apple A13 Bionic chipset for the iPhone 11 series in 2019 is produced on a 7nm process node and has 8.5 billion transistors. The A16 Bionic used to power this year’s iPhone 14 Pro series is manufactured on a 4nm process (actually an enhanced 5nm process node) and carries nearly 16 billion transistors. The higher the number of transistors in a chip, the more powerful and energy-efficient it will be.
Gelsinger is optimistic that Intel will use a RibbonFET transistor architecture similar to the Gate-All-Around (GAA) Samsung uses on its 3nm components. TSMC will start using GAA in its 2nm chips. With GAA, the nanosheets are stacked vertically, allowing all sides of the channel to be covered by the gate. This reduces leakage and can increase transistor density, allowing more transistors to fit into dense spaces.
Intel’s PowerVia (or back-powered) technology is also excellent. This allows the transistors to draw power from one side of the chip while the other side is used to connect data communications links.